Projects

RTL RISC-V CPU Implementation & Verification

Designed and verified an RTL RISC-V CPU with differential testing, exception handling, and system-level bring-up.

• Designed RTL datapath and control logic for a RISC-V CPU core
• Implemented CSR-based exception and trap handling mechanism
• Built a C reference model and applied differential testing
• Developed a Verilator-based simulation and debugging environment
• Brought up RT-Thread on the RTL CPU for system-level validation

Tools: Verilog, C, Verilator, GTKWave, RISC-V, Difftest

Smart Car Race – Triple-Vehicle Formation System

Designed and implemented a triple-vehicle formation racing system with path tracking, road condition recognition, and coordinated overtaking.

• Led development of a three-vehicle coordinated racing system
• Implemented electromagnetic wire-based path tracking
• Designed algorithms for bend and cross-road recognition
• Developed coordinated overtaking strategy at fork roads
• Designed circuit and system using CH32V307VCT6 and STC16F40K128
• Built Bluetooth-based inter-vehicle communication

Award: National Second Prize, China Undergraduate Smart Car Race (17th)

Tools: CH32V307, STC16, Embedded C, Motor Control, Sensors, Bluetooth

Electronic Design Contest – Dual-Vehicle Following System

Designed and implemented a dual-vehicle following system with sensor-based tracking, inter-vehicle communication, and autonomous distance control.

• Led development of a dual-vehicle cooperative control system
• Implemented grayscale sensor-based path tracking
• Integrated ultrasonic ranging for distance measurement
• Built Bluetooth-based inter-vehicle communication
• Designed control, power, and motor drive circuits using MSP430F5529
• Optimized control strategy for stable following and overtaking

Award: Provincial First Prize, Jiangsu Undergraduate Electronic Design Contest

Tools: MSP430F5529, Embedded C, Sensors, Motor Control, Bluetooth