Analog / Mixed-Signal
Analog circuit design and layout
My Class-AB amplifier project covers schematic design and custom layout in Virtuoso, physical verification in Calibre, and post-layout simulation.
Explore the project →About
About me
I am a full-time M.Sc. student in Integrated Circuit Design in the joint TUM–NTU programme. My work spans transistor-level analog design, RTL and SoC integration, verification, and hands-on hardware development.
Technical scope
What I work on
Digital IC / SoC
RTL, interfaces, and debug
Verilog/SystemVerilog, a multi-cycle RV32E CPU, valid-ready control, AXI/APB integration, NEMU difftest, Verilator, waveform and transaction-level debugging.
Explore the project →Hardware / Embedded
Boards and system bring-up
PCB design, assembly, soldering and rework, MCU interfaces, sensors, motor-control integration, and system-level debugging.
Explore the project →Education
M.Sc. in Integrated Circuit Design
A full-time joint programme of the Technical University of Munich and Nanyang Technological University, leading to one jointly awarded degree.
- Graduate
- TUM / NTU · M.Sc. Integrated Circuit Design · 2025.08–2027.07 (expected)
- Undergraduate
- Jiangsu Normal University · B.Eng. in Electronic Information Engineering · Sep 2020–Jun 2024
- Languages
- IELTS 7.0; Passed CET-4 and CET-6
Beyond the portfolio
Hands-on making
Outside IC design, I enjoy 3D printing, crafts, and music. Here are some things I have made and moments from university life.
View Beyond Engineering →